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      FAKE   


NEC

n.n. Microprocessor Package Additional description
1
2
3
4
5		 D780C
D780C-1
D70008A-6
D8080AFC
8080AF-2		 PDIP-40
PDIP-40
PQFP-44
PDIP-40
CDIP-40		 8401XD; JAPAN
8243XD; JAPAN
8852LP704; JAPAN
8434R8
P8Z059; white ceramic/gold pins/silver lid
6
7
8
9
10
11
12
13		 D8085A
D8085AC
D8085AC-2
D8085AHC
D8085AHC-2
D8088D
D8088D-2
D8086D-2		 SBCDIP-40
PDIP-40
PDIP-40
PDIP-40
PDIP-40
CDIP-40
CDIP-40
CDIP-40		 H05029; white ceramic/gold pins/silver lid
H14045-114; JAPAN
H0710D-028; JAPAN
8438K8
8833MP003; JAPAN
8248K6; JAPAN
NEC; JAPAN; 8638L9; D8088D-2 © NEC 1981
NEC; JAPAN; 8914F9; D8086D-2 © NEC 1981
14
15
16
17
18
19
20
21		 D70108C-8 V20, JAPAN
D70108C-8 V20, U.S.A
D70108C-10 V20
D70208GF-8 V40
D70208L-10 V40
D70216GF-8 V50
D70216HGF-16 V50
D70236AGD-16 V53A		 PDIP-40
PDIP-40
PDIP-40
PQFP-80
PLCC-68
PQFP-80
PQFP-80
PQFP-120		 8837NX; ©'84 NEC; JAPAN
8925YV; ©'84 NEC; U.S.A
9337Y5; ©'84 NEC; JAPAN
© NEC'84; 9303HU007; JAPAN
© NEC'84; 9326HVA74; USA
© NEC'84; 8749PK004; JAPAN
© NEC'84; 9409PK704; JAPAN
0047PK016; JAPAN
22
23
24
25
26
27
28
29
30
31
32		 D30362R-40, VR3600A-40
D30200GD-100, VR4300
D30200GD-133, VR4300
D30200GD-80, VR4305
D30210GD-133, VR4310
D30401RJ-50, VR4000SC-50
D30500RJ-180, VR5000
D30500RJ-200, VR5000
D30550AGD-350, VR5532A
D30700RS-180, VR10000
D30700RS-200, VR10000		 CPGA-175
PQFP-120
PQFP-120
PQFP-120
PQFP-120
CPGA-447
CPGA-223
CPGA-223
PQFP-208
CLGA-599
CLGA-599		 NEC JAPAN; D30362R-40; VR3600A-40; 9308E9
9805PK003; JAPAN
9845EK012; JAPAN
0429KX001; JAPAN
0021KK009; JAPAN
9310E9001 2.2; JAPAN
9705K9016 R2.4; JAPAN
0035E9007 R2.6; JAPAN
0438KX005; JAPAN
9722E9004 ES2.6; JAPAN
9634K9012 ES2.5; JAPAN
33 D77P220R-10 CPGA-68 with window 9303E9201; JAPAN; 24-bit, Fixed-Point DSP

1

 D780C

           2

 D780C-1

           3

 D70008A-6

CPU Frequency:
Manuf. process:
Data width:
On-chip peripherals:
Vcc:
Operating temperature:

2.5 MHz
NMOS
8 bit
DRAM refresh
5 V
(0 - 70) °C

CPU Frequency:
Manuf. process:
Data width:
On-chip peripherals:
Vcc:
Operating temperature:

4 MHz
NMOS
8 bit
DRAM refresh
5 V
(0 - 70) °C

 CPU Frequency:
Manuf. process:
Data width:
Physical memory:
On-chip peripherals:
Vcc:		 6 MHz
CMOS
8 bit
64 KB
DRAM refresh
5 V

 4

 D8080AFC

           5

 8080AF-2

           6

 D8085A

CPU Frequency:
Manuf. process:
Data width:
Vcc:


Operating temperature:		 2 MHz
NMOS
8 bit
+5 V;
+12 V;
-5 V
(0 - 70) °C		 CPU Frequency:
Manuf. process:
Data width:
Vcc:


Operating temperature:		 2.5 MHz
NMOS
8 bit
+5 V;
+12 V;
-5 V
(0 - 70) °C		 CPU Frequency:
Manuf. process:
Data width:
Physical memory:
Vcc:
Operating temperature:		 3 MHz
NMOS
8 bit
64 KB
5 V
(0 - 70) °C

7

 D8085AC 

            8

 D8085AC-2 

            9

 D8085AHC 
CPU Frequency:
Manuf. process:
Data width:
Physical memory:
Vcc:
Operating temperature:		 3 MHz
NMOS
8 bit
64 KB
5 V
(0 - 70) °C		 CPU Frequency:
Manuf. process:
Data width:
Physical memory:
Vcc:
Operating temperature: 		5 MHz
NMOS
8 bit
64 KB
5 V
(0 - 70) °C		 CPU Frequency:
Manuf. process:
Data width:
Physical memory:
Vcc:
Operating temperature:		 3 MHz
HMOS
8 bit
64 KB
5 V
(0 - 70) °C

10

 D8085AHC-2 

            11

 D8088D

           12

 D8088D-2

CPU Frequency:
Manuf. process:
Data width:
Physical memory:
Vcc:
Operating temperature:		 5 MHz
HMOS
8 bit
64 KB
5 V
(0 - 70) °C		 CPU Frequency:
Manuf. process:
Data bus width (ext.):
Data bus width (int.):
Physical memory:
Vcc:
Operating temperature:		 5 MHz
NMOS
8 bit
16 bit
1 M
5 V
(0 - 70) °C		 CPU Frequency:
Manuf. process:
Data bus width (ext.):
Data bus width (int.):
Physical memory:
Vcc:
Operating temperature:		 8 MHz
NMOS
8 bit
16 bit
1 M
5 V
(0 - 70) °C

13

 D8086D-2 

            14

 D70108C-8 V20, JAPAN 

            15

 D70108C-8 V20, U.S.A

CPU Frequency:
Manuf. process:
Data bus width (ext.):
Data bus width (int.):
Physical memory:
Vcc:
Operating temperature:		 8 MHz
NMOS
16 bit
16 bit
1 M
5 V
(0 - 70) °C		 CPU Frequency:
Manuf. process:
Introduction year:
Data bus width (ext.):
Data bus width (int.):
Physical memory:
Vcc:		 8 MHz
CMOS
1984
8 bit
16 bit
1 M
5 V		 CPU Frequency:
Manuf. process:
Introduction year:
Data bus width (ext.):
Data bus width (int.):
Physical memory:
Vcc:		 8 MHz
CMOS
1984
8 bit
16 bit
1 M
5 V
 

16

 D70108C-10 V20

           17

 D70208GF-8 V40

           18

 D70208L-10 V40

CPU Frequency:
Manuf. process:
Introduction year:
Data bus width (ext.):
Data bus width (int.):
Physical memory:
Vcc:		 10 MHz
CMOS
1984
8 bit
16 bit
1 M
5 V		 CPU Frequency:
Manuf. process:
FPU:
Data bus width (ext.):
Data bus width (int.):
Physical memory:
Vcc:		 8 MHz
CMOS
uPD72191
8 bit
16 bit
1 M
5 V		 CPU Frequency:
Manuf. process:
FPU:
Data bus width (ext.):
Data bus width (int.):
Physical memory:
Vcc:		 10 MHz
CMOS
uPD72191
8 bit
16 bit
1 M
5 V
     

19

 D70216GF-8 V50 

            20

 D70216HGF-16 V50

           21

 D70236AGD-16 V53A

CPU Frequency:
Manuf. process:
FPU:
Data bus width (ext.):
Data bus width (int.):
Physical memory:
Vcc:		 8 MHz
CMOS
uPD72191
8 bit
16 bit
1 M
5 V		 CPU Frequency:
Data bus width (ext.):
Data bus width (int.):
Physical memory:
Vcc:		 16 MHz
8 bit
16 bit
1 M
5 V		 CPU Frequency:
Manuf. process:
Physical memory:		 16 MHz
CMOS
16 M
     

22

 D30362R-40, VR3600A-40

           23

 D30200GD-100, VR4300 

            24

 D30200GD-133, VR4300 
    CPU Frequency:
Address bus width:
Data bus width:
L1 cache (instr./data):
FPU:
Vcc:		 100 MHz
32 bit
32 bit
16/8 KB
Integrated
3.3 V		 CPU Frequency:
Address bus width:
Data bus width:
L1 cache (instr./data):
FPU:
Vcc: 		133 MHz
32 bit
32 bit
16/8 KB
Integrated
(3.0 - 3.5) V
  Note: 64-bit RISC MIPS architecture Note: 64-bit RISC MIPS architecture

25

 D30200GD-80, VR4305 

            26

 D30210GD-133, VR4310 

            27

 D30401RJ-50, VR4000SC-50

CPU Frequency:
Address bus width:
Data bus width:
L1 cache (instr./data):
FPU:
Vcc:		 80 MHz
32 bit
32 bit
16/8 KB
Integrated
3.3 V		 CPU Frequency:
Address bus width:
Data bus width:
L1 cache (instr./data):
FPU:
Vcc:		 133 MHz
32 bit
32 bit
16/8 KB
Integrated
(3.0 - 3.5) V		 CPU Frequency:
Data bus width:
FPU:		 50 MHz
64 bit
Integrated
Note: 64-bit RISC MIPS architecture Note: 64-bit RISC MIPS architecture  

28

 D30500RJ-180, VR5000

           29

 D30500RJ-200, VR5000 

            30

 D30550AGD-350, VR5532A

CPU Frequency:
Address bus width:
Data bus width:
L1 cache (instr./data):
FPU:
Vcc:		 180 MHz
32 bit
32 bit
32/32 KB
Integrated
3.3 V		 CPU Frequency:
Address bus width:
Data bus width:
L1 cache (instr./data):
FPU:
Vcc:		 200 MHz
32 bit
32 bit
32/32 KB
Integrated
3.3 V		 CPU Frequency:
Address bus width:
Data bus width:
L1 cache (instr./data):
FPU:
Vcc:		 350 MHz
32 bit
32 bit
32/32 KB
Integrated
(1.5/3.3)V Core/ I/O
Note: 64-bit RISC MIPS architecture Note: 64-bit RISC MIPS architecture  

31

 D30700RS-180, VR10000

           32

 D30700RS-200, VR10000

           33

 D77P220R-10

CPU Frequency:
Data bus width:
L1 cache (instr./data):
FPU:
Vcc:		 180 MHz
64 bit
32/32 KB
Integrated
3.3 V		 CPU Frequency:
Data bus width:
L1 cache (instr./data):
FPU:
Vcc:		 200 MHz
64 bit
32/32 KB
Integrated
3.3 V		 ALU:
Instruction ROM:
Data ROM:
Data RAM:		 24 bits, Fixed-Point
2048x32 bits
1024x24 bits
512x24 bits
     

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